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Composable TIR intrinsics with optional bias?
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0
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264
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January 29, 2024
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Non blocking socket
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0
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297
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January 29, 2024
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[Relax] mlc-llm create custom func fail
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0
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557
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January 28, 2024
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[Dlight] Enabling Fast and Efficient Kernel Generation by Hardware information
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3
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2679
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January 28, 2024
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[TMVC] Error when converting NHWC Model
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1
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321
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January 27, 2024
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Specify the GPU ID when using tvm.target.cuda()?
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0
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287
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January 26, 2024
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Getting target tripple - config.guess script
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0
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341
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January 25, 2024
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[Relay] TVMError: primitive functions not set on Relay function by TECompiler
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4
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1055
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January 25, 2024
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TVM Unity Open Development Meeting Jan. 30, 2024
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0
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521
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January 24, 2024
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Edge cases when using TIR intrinsics
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2
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484
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January 24, 2024
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Error using tvmc even after successfully installing tvm
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3
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955
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January 24, 2024
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[TensorIR] CompareBufferRegion buffer region min mismatch. lhs->region[i + offset]=range(min=v_kw_i, ext=1)Range(0x55da9e5b0ac0) vs rhs->region[i]=range(min=vr, ext=1)Range(0x55da9e593100)
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1
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491
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January 23, 2024
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Get block_attr?
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0
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252
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January 23, 2024
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[DISCUSS] TVM Tutorials
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1
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464
|
January 23, 2024
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What is the usecase for reorder_block_iter_var schedule primitive
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0
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268
|
January 23, 2024
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Cannot recognize llvm-config character
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1
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793
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January 22, 2024
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Main now transitions to unity
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1
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884
|
January 21, 2024
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LayerNorm Error in thread_storage_sync when read x into shared memory
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0
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414
|
January 20, 2024
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[Unity] Open Development Meeting Jan. 23, 2024
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0
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424
|
January 19, 2024
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Segmentation Fault when executing set_input
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0
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444
|
January 19, 2024
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Could tir transform support cache read to different dtype, like float16 to int32?
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2
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420
|
January 19, 2024
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TVMC tuning for M55/U55 (MPS3-AN547) Arm FPGA Board
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1
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618
|
January 18, 2024
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[TIR] Any Infra to support Block Rasterization?
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0
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344
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January 17, 2024
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TVMC print IR before/after named pass
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3
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1127
|
January 16, 2024
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Error when converting TFLite Conv2D kernel layout to OIHW4o
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0
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796
|
January 16, 2024
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Calling TIR scheduled function in Relay
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3
|
441
|
January 16, 2024
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How to know relay module run on VTA or CPU
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0
|
263
|
January 16, 2024
|
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How to build TVM runtime for Hexagon v73 DSP/HTP
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0
|
494
|
January 15, 2024
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TVMError: LLVM cpu architecture `-mcpu=rocketlake-avx512` is not valid in `-mtriple=x86_64-unknown-linux-gnu`
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0
|
605
|
January 16, 2024
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Downcast from GlobalVar to Op failed
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0
|
445
|
January 15, 2024
|