[Relax] cross-layer-oiptimizations
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3
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320
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February 16, 2024
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TVM transform passes speed issues
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3
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283
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February 15, 2024
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[MetaSchedule] How to resume tuning?
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3
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438
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February 14, 2024
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Error about relay.nn.conv2d: Entry function uses too much shared data
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0
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122
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February 13, 2024
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How to reduce store instrcutions
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0
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110
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February 8, 2024
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Extracting a model library in TVM-Unity
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2
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369
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February 6, 2024
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TVM contributions starting point
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0
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164
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February 4, 2024
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Merge Composites
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0
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110
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February 4, 2024
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Error while building cpptest through Visual Studio 16 2019
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2
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176
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February 3, 2024
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LLVM cpu features i.e -mattr
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0
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171
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February 2, 2024
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How to check annotation value (knob) in auto-tuning process
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1
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124
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February 1, 2024
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Question about [Unity] tag in PR title
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2
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127
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February 1, 2024
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hifiGAN Inference speed with tvm optimized slower than onnxruntime
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1
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474
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February 1, 2024
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Information on Reduce-Branching-Through-Overcompute pass and how to extend the pass if needed
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0
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112
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January 31, 2024
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[MetaSchedule] Tricks to Improve Codegen Performance for Conv2D Ops
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0
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101
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January 31, 2024
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[auto-tvm]What does a cost model do in auto tuning
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10
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960
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January 30, 2024
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[VM] VM compile
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0
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115
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January 30, 2024
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Composable TIR intrinsics with optional bias?
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0
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86
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January 29, 2024
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Non blocking socket
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0
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91
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January 29, 2024
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[TMVC] Error when converting NHWC Model
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1
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95
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January 27, 2024
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Specify the GPU ID when using tvm.target.cuda()?
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0
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112
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January 26, 2024
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Edge cases when using TIR intrinsics
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2
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204
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January 24, 2024
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Get block_attr?
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0
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88
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January 23, 2024
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[DISCUSS] TVM Tutorials
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1
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167
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January 23, 2024
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Cannot recognize llvm-config character
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1
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145
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January 22, 2024
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Calling TIR scheduled function in Relay
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3
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175
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January 16, 2024
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How to know relay module run on VTA or CPU
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0
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104
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January 16, 2024
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How to build TVM runtime for Hexagon v73 DSP/HTP
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0
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167
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January 15, 2024
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[Unity][Relax] Pattern matching a bunch of call_tir functions with similar names
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1
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151
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January 15, 2024
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Missing thread bind loops under block reduction when transformed with tir
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4
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190
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January 13, 2024
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