Some question for running AI models trained in TensorFlow on a Xilinx Ultra96v2 FPGA board

Questions
#1

Our goal is to run AI models trained in TensorFlow on a Xilinx Ultra96v2 FPGA board. Following the instructions provided in the linked guide, we are executing AI models compiled with TVM using the Vitis AI DPU.

The tools and versions currently being used are as follows:

  • PYNQ: Version 3.0.1
  • Vitis AI: Version 2.5
  • TVM: Version 0.19

Below are the issues we need help resolving:

  1. TensorFlow Model Conversion Error Following the example (Compile Tensorflow Models — tvm 0.19.dev0 documentation), when converting a TensorFlow AI model into a relay model using the tvm.relay.frontend.from_tensorflow function, we encounter the error: 2.*“TypeError: dense() got an unexpected keyword argument ‘grad_a’.”** We believe this issue arises because of differences in TensorFlow model arguments introduced with the transition from TensorFlow 1 to TensorFlow 2 (Calling a Dense layer fails when it is created with kernel_initializer=tf.keras.initializers.Zeros() · Issue #24573 · tensorflow/tensorflow · GitHub). Additionally, it seems that the TVM version being used does not support TensorFlow 2 (How to import native Tensorflow2 trained model into TVM Relay? - #3 by jinchenglee). Could you confirm the TensorFlow version compatible with the TVM version we are using?

  2. Build Error on TVM Runtime for Ultra96v2 Following the steps in the linked guide (Vitis AI Integration — tvm 0.19.dev0 documentation), we built TVM on the Ultra96v2. However, when importing the library with import tvm.relay as relay, the error occurs: 3.*“AttributeError: module ‘tvm.relay._ffi_api’ has no attribute ‘Any’.”** We suspect this is due to a dependency issue, where a specific library might be missing during runtime installation (AttributeError when import tvm.relay - #5 by abdulazizm). If this is the case, could you provide additional setup instructions or recommend compatible versions? If this assumption is incorrect, please advise on how to identify the root cause and resolve this issue.

  3. DPU Virtual Implementation and Simulation In previous projects using VTA, we relied on the VTA simulator (VTA Installation Guide — tvm 0.8.dev0 documentation) for functional verification by simulating the NPU. Does Vitis AI’s DPU provide a similar simulation capability, or are there examples for this? According to this post (AMD Customer Community), such a simulator is not available. Would it be possible to simulate the Vitis AI DPU using TVM’s Target.virtualmachine function? If so, could you provide guidance or examples?