VTA, Chisel: VCR address map

Hi @antoinek, I don’t know if this is helpful, but I found a similar issue because the register offsets in pynq_driver.cc did not make sense when generating the Chisel backend. Thanks to this post I noticed that actually, the driver needs to be changed to resemble the de10nano driver.

After doing this I was able to run at least the matrix multiply test without errors on an FPGA

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