Using TIR schedule with microTVM: Accurate on-chip memory descriptions

Questions
#1

Hello,

I have a tir schedule that I want to convert to C code for my custom hardware. Here is a snippet of the generated C code:

 void* res_local_acc = TVMBackendAllocWorkspace(1, dev_id, (uint64_t)130816, 0, 8);
  if (res_local_acc == NULL) {
    return -1;
  }
  void* b_in_local_spad_w = TVMBackendAllocWorkspace(1, dev_id, (uint64_t)524288, 0, 8);
  if (b_in_local_spad_w == NULL) {
    return -1;
  }
  void* a_in_local_spad = TVMBackendAllocWorkspace(1, dev_id, (uint64_t)524288, 0, 8);
  if (a_in_local_spad == NULL) {
    return -1;
  }

  for (int32_t i_0 = 0; i_0 < 2; ++i_0) {
    for (int32_t j_0 = 0; j_0 < 2; ++j_0) {
      for (int32_t k_0 = 0; k_0 < 16; ++k_0) {
        for (int32_t ax1_0 = 0; ax1_0 < 16; ++ax1_0) {
          for (int32_t ax0_0 = 0; ax0_0 < 4; ++ax0_0) {
            int32_t cse_var_1 = ((((k_0 * 32768) + (ax0_0 * 8192)) + (j_0 * 256)) + (ax1_0 * 16));
            data_mvin(16, 16, (&(((int8_t*)b_in)[cse_var_1])), (&(((int8_t*)b_in_local_spad_w)[cse_var_1])));
          }
        }
	  }
	}
  }

I want to get rid of the TVMBackendAllocWorkspace but I can’t figure out which pass I need to apply here. The allocated workspaces should correspond to the on-chip memory, so there is no need to allocate them.

The second thing I would like to change is the address of second address to the b_in_local_spad_w. I would like this to be a uint32 but when I try to define the access ptr as such I get an error:

git/tvm/src/tir/transforms/lower_device_storage_access_info.cc", line 88
TVMError: 
---------------------------------------------------------------
An error occurred during the execution of TVM.
For more information, please see: https://tvm.apache.org/docs/errors.html
---------------------------------------------------------------
  Check failed: (op->dtype.is_handle()) is false:

I think the errors are related, but I am not sure how to resolve this. Does anyone know how to do this?