[RFC] Enable TVM QNN on RISC-V with Subword SIMD Computation

Development RFC
5

Thank you for the reply. We’re checking if we have any flow can try or reuse from the information you gave. Sorry for the wrong information and links in the post.

  • The link to host.cpp (also with kernel.inc)
  • In the evaluation part, the title of the table should be reversed. The one with fewer instructions is Pre-quantized with tensorization/vectorization and the other one is FP32.

Thanks!