Hi guys, I’m currently investigating the possible solutions to do inference acceleration on a niche FPGA dev-board. As the vendor provides only the basic verilog synthesis tools and generic IPs like PCI-e and DDR3, no embedded processor nor OpenCL is available. I’m wondering if I can build a custom backend that communicates with the board via PCI-e, similar to the role of the embedded cores on Xilinx devices, but on the host PC.
I’m pretty new to this topic so any sort of pointers will be of great help! Also, the core component is a Pango PGL50H and the vendor uses their own toolchain called PDS, if relevant.