Recently, I want to use TVM’s auto scheduler to automatically tune the GEMM operator, and build the tuned scheduler to generate the underlying code using the SVE instruction set. However, I found that the assembly code after the build only uses the neon instruction set, not the SVE instruction set (target has been set to “llvm -mtriple=aarch64-linux-gnu -mattr=+sve”). So I would like to ask, do I need to put some kind of SVE mark in the schedule so that LLVM can recognize it and generate SVE code?
