Bringing microTVM to a custom RISC-V core with a custom accelerator?

Hello everyone. I am new to the TVM community.

I have been evaluating multiple tech stacks for enabling DL development on my small custom RISCV core + custom accelerator. I have landed on microTVM as the best solution because it seems like it has support for the following: (1) bare metal operation, (2) C code generation, (3) AOT compilation, and (4) BYOC for my custom HW-accelerated node ops.

However, I am a little lost how to get started on this endeavor with the current state of TVM/microTVM. There are some similar posts from 2021, but these seem outdated.

I would greatly appreciate support on any of the following: a description of the high-level steps I will have to take, a description of the modifications or additions I will have to make to TVM, and direction toward any such examples. Thank you!