Hi all. I’m looking for a way to attach a pragma to a schedule; specifically, the import_llvm pragma:
schedule[...].pragma(
axis, "import_llvm",
ir::StringImm::make("/path/to/some/llvm.bc"));
I’m looking for a quick-and-dirty solution at first. Jared pointed me to one place I might hack it in: in the Create function of Relay’s ScheduleGetter, specifically here. There’s already some operation manually being done to schedules (compute_inline), so he thought it might be a good place to hack in a call to pragma as well.
I attempted this. The resulting code looked like:
if (master_attrs_.as<DeviceCopyAttrs>() == nullptr) {
schedule =
fschedule[master_op_](master_attrs_, tensor_outs, target_);
for (auto tensor_out : tensor_outs) {
if (auto tensor_op = schedule[tensor_out]->op.as<ComputeOpNode>()) {
schedule[tensor_out].pragma(
tensor_op->axis[0], "import_llvm",
ir::StringImm::make("/Users/gus/posit-wrapper-llvm/build/posit-wrapper.bc"));
}
}
for (const auto& scalar : scalars_) {
if (schedule->Contain(scalar)) {
schedule[scalar].compute_inline();
}
}
}
However, I’m getting an error when I try to modify the schedule:
TVMError: Operate on iter var iter_var(ax0, range(min=0, ext=5))that has already been split
This is occurring in the call to pragma:
[bt] (8) 9 libtvm.dylib 0x0000000117ccca23 tvm::relay::CompileEngineImpl::Lower(tvm::relay::CCacheKey const&) + 51
[bt] (7) 8 libtvm.dylib 0x0000000117ccecbe tvm::relay::CompileEngineImpl::LowerInternal(tvm::relay::CCacheKey const&) + 1358
[bt] (6) 7 libtvm.dylib 0x0000000117ccfab1 tvm::relay::CompileEngineImpl::CreateSchedule(tvm::relay::Function const&, tvm::Target const&) + 113
[bt] (5) 6 libtvm.dylib 0x0000000117cd434b tvm::relay::ScheduleGetter::Create(tvm::relay::Function const&) + 4315
[bt] (4) 5 libtvm.dylib 0x0000000116ea1a6b tvm::Stage::pragma(tvm::IterVar, std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char> > const&, tvm::Expr const&) + 363
[bt] (3) 4 libtvm.dylib 0x0000000116ea1bf4 void tvm::UpdateIterVarAttr<tvm::Stage::pragma(tvm::IterVar, std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char> > const&, tvm::Expr const&)::$_1>(tvm::StageNode*, tvm::IterVar, tvm::Stage::pragma(tvm::IterVar, std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char> > const&, tvm::Expr const&)::$_1, bool) + 100
[bt] (2) 3 libtvm.dylib 0x0000000116e9d0ac tvm::(anonymous namespace)::FindLeafVar(tvm::ArrayNode*, tvm::ArrayNode*, tvm::IterVar const&) + 364
[bt] (1) 2 libtvm.dylib 0x0000000115f00605 dmlc::LogMessageFatal::~LogMessageFatal() + 21
[bt] (0) 1 libtvm.dylib 0x0000000115f03a53 dmlc::LogMessageFatal::~LogMessageFatal() + 67
I’m having a hard time interpreting the error, given that I don’t know much at the moment about schedules and itervars. It seems to imply that the itervar has already been modified in some way, and so this modification is producing an error?
Any help on either
- deciphering this error, or
- any other places I could insert a call to
pragma
Thank you!