Hello. Some users want to enable SYCL backend for tvm.
My workmates and I are interested in SYCL backend, and have done a base version. We want to know if this might be accepted by tvm teams. If possible, hope to raise some points for attention. We will continue to improve the code and submit a PR within a month.
That definitely sounds interesting! Would you mind if you could sned a quick RFC with some more design details? Thanks a lot!
OK, will do. In addtion, are there examples of design RFC?
Yes I’m very interested! I can help land your PRs. I bought an Intel dGPU and would love to tap into its matrix core (xmx) from TVM. What are your target device and runtime (intel GPU + level zero etc)?
Another interesting question: Should we introduce SYCL kernel codegen like we do for CUDA? Or would existing SPIR-V codegen suffice for SYCL environments?
There are many examples of RFC in https://github.com/apache/tvm-rfcs.
@dongbaiyue Hello, SYCL backend is definitely interesting. Is there any progress? If there is a base version, we would like to join on this development. Thanks a lot.
I like the idea of expand our existing SPIR-V codegen, and exploring XMX usage in compiler intrinsics; Cuz more hardware/ecosystem could benefit from SPIR-V; From the aspect of device, Arc A750/A770 would be a proper device, it has almost same architecture with Intel cloud GPU. I suggest try it on OCL runtime.
Extending SPIR-V codegen to use intel’s xmx is a great idea. Besides, SYCL is converted to different instruction sets (SPIR-V/NVPTX/AMDGCN) for different hardware (intel/nvidia/amd gpu) . So SYCL backend should introduce SYCL kernel codegen.