Where to find the codes that map the nn to the device?

1

Could someone tell me which codes generate the GPU’s ISA? I want to change some code so that I could get the ISA for my own backend. Thank you so much!

2

The codegen module locates in src/target/. LLVM backend are in src/target/llvm. Source-to-source compilers are in src/target/source

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3

Thank for your replying.Do you think my thought that change some codes so I can deploy nn to the new backend is feasible?

4

It highly depends on the level you want to work on.

If your hardware already has a LLVM target, you may add a new LLVM-based backend in code generation.

If you want to integrate a few specific instructions (e.g. tensor core intrinsics) while remaining other parts untouched, you may take a look at the tensorization tutorial in TVM.

If you are interested in offloading a few nn operators to your own/third-party library, you might be interested in the BYOC work.

In terms of GPU in your question, if you are referring to CUDA GPU, there are already two backends, one is source-to-source compiler (TIR to CUDA source), and another is lowering to LLVM NVPTX.

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