[VTA] Issue with TSIM based simulation of resnet18 inference on VTA

Hi @liangfu,

I got similiar result as @BharathKinnal due to assert(cat_detected) failed.

With the fix in PR #4574, I got a compilation error since the aluBits is not defined in class TensoreAlu.

After adding the following code at line 111, the compilation went through, but the simulation still failed with assert(cat_detected).

  *val aluBits = p(CoreKey).accBits*

Did you see the same issue on your end ?

Best regards.