Hi @dsr91, thanks for the question. Indeed the rationale behind using the autotuner was that it would eliminate invalid schedules during the schedule search. For VTA, many schedules lead to invalid code-gen, because it doesn’t pattern match (e.g. conv2d), or for some other reason (runtime checks for valid schedules etc.). Therefore many of the schedules get discarded away.
In general I think there can be a much smarter way to approach the schedule search and applying more constraints but for that experiment on FPGAs it did the trick.