I’m porting TVM to a new hardware. The hardware is abstracted by an abstract machine that operates on relatively high-level operations. Each operation of the abstract machine can correspond to a single stage operation of TVM schedule. In schedule_ops.cc:MakePipeline() TVM converts such stage operations to lower level loops and operations on array elements. For my target I would like to avoid such conversion. At the same time, if I understand correctly, TVM optimizations require the lower level representation that MakePipeline produces. Yet it seems I would not want to use the low-level Relay IR at all. My question is how should I implement the code generator for my target. And are there at all benefits of using TVM for such a system?
Thanks.