We’ll also have access to an Achronix Speedster7t, which has special support for DL NN features.
If I am not mistaken, UofWashington will have some of these boards as well.
From their description: The Speedster7t FPGA family represents a new class of technology. Based on a new, highly optimized architecture, the Speedster7t family goes beyond traditional FPGA solutions, delivering ASIC-like bandwidth performance, FPGA adaptability and enhanced functionality to streamline design. Manufactured on TSMC’s 7nm FinFET process, Speedster7t FPGAs feature a revolutionary new 2D network-on-chip (NoC), an array of new machine learning processors (MLPs) optimized for high-bandwidth and artificial intelligence/machine learning (AI/ML) workloads, high-bandwidth GDDR6 interfaces, 400G Ethernet and PCI Express Gen5 ports — all in a single device.
It is the applicability and targetability of the MLPs by the TVM compiler and the VTA architecture that is of interest to explore and benchmark against GPUs and TPUs.