# Questions **URL:** https://discuss.tvm.apache.org/c/questions/7.md?page=2 [Latest](https://discuss.tvm.apache.org/latest.md) · [Categories](https://discuss.tvm.apache.org/categories.md) **Page:** 3 --- ## [\[Relax\]\[ONNX Frontend\] Does the Relax frontend support NonMaxSuppression?](https://discuss.tvm.apache.org/t/relax-onnx-frontend-does-the-relax-frontend-support-nonmaxsuppression/18151)
**Author:** [@Peng](https://discuss.tvm.apache.org/u/Peng)\ **Replies:** 6\ **Last updated:** [July 30, 2025, 8:51am UTC](https://discuss.tvm.apache.org/t/relax-onnx-frontend-does-the-relax-frontend-support-nonmaxsuppression/18151 "2025-07-30T08:51:28Z")
TVM main branch has removed the Relay frontend. And it is claimed that the Relax Onnx frontend supports all operators that Relay could support: Phasing out Legacy Components - #20 by Hzfengsy From the code: tvm/python/t… --- ## [\[SOLVED\] How to fuseOPs concat(\[op0, op1\])](https://discuss.tvm.apache.org/t/solved-how-to-fuseops-concat-op0-op1/18484)
**Author:** [@xinche](https://discuss.tvm.apache.org/u/xinche)\ **Replies:** 2\ **Last updated:** [July 25, 2025, 7:25am UTC](https://discuss.tvm.apache.org/t/solved-how-to-fuseops-concat-op0-op1/18484 "2025-07-25T07:25:20Z")
My relax ir as: and I need to fuse Ops in the red box as: then I write a pattern and call relax.transform.FuseOpsByPattern pass: the result is: which is not a well formed module. --- ## [Auto schedule performing worse than no schedule?](https://discuss.tvm.apache.org/t/auto-schedule-performing-worse-than-no-schedule/18479)
**Author:** [@reikdas](https://discuss.tvm.apache.org/u/reikdas)\ **Replies:** 0\ **Last updated:** [July 23, 2025, 2:51pm UTC](https://discuss.tvm.apache.org/t/auto-schedule-performing-worse-than-no-schedule/18479 "2025-07-23T14:51:05Z")
Prorgam with no schedule: import time import tvm from tvm import relax from tvm.script import ir as I from tvm.script import relax as R from tvm.script import tir as T @I.ir\_module class Module: @T.prim\_func d… --- ## [Why does meta schedule not find any schedules?](https://discuss.tvm.apache.org/t/why-does-meta-schedule-not-find-any-schedules/18468)
**Author:** [@reikdas](https://discuss.tvm.apache.org/u/reikdas)\ **Replies:** 3\ **Last updated:** [July 17, 2025, 5:01pm UTC](https://discuss.tvm.apache.org/t/why-does-meta-schedule-not-find-any-schedules/18468 "2025-07-17T17:01:46Z")
import tvm from tvm.script import relax as R from tvm.script import ir as I from tvm.script import tir as T import tempfile import tvm.meta\_schedule as ms from tvm.ir import IRModule @I.ir\_module class Module: @T.pr… --- ## [Disable specific schedule in MetaSchedule?](https://discuss.tvm.apache.org/t/disable-specific-schedule-in-metaschedule/18474)
**Author:** [@reikdas](https://discuss.tvm.apache.org/u/reikdas)\ **Replies:** 1\ **Last updated:** [July 17, 2025, 4:49pm UTC](https://discuss.tvm.apache.org/t/disable-specific-schedule-in-metaschedule/18474 "2025-07-17T16:49:43Z")
Specifically, is there a way to force MetaSchedule to ignore the parallelize primitive from its search space? --- ## [How can I use TVM+Tensorrt for algorithm deployment and achieve better performance than using Tensorrt alone](https://discuss.tvm.apache.org/t/how-can-i-use-tvm-tensorrt-for-algorithm-deployment-and-achieve-better-performance-than-using-tensorrt-alone/18473)
**Author:** [@wjh](https://discuss.tvm.apache.org/u/wjh)\ **Replies:** 0\ **Last updated:** [July 17, 2025, 2:07am UTC](https://discuss.tvm.apache.org/t/how-can-i-use-tvm-tensorrt-for-algorithm-deployment-and-achieve-better-performance-than-using-tensorrt-alone/18473 "2025-07-17T02:07:22Z")
import onnx import numpy as np import tvm from tvm import runtime import tvm.relay as relay import tvm.relax as relax from tvm.contrib import graph\_executor,debugger from tvm.relay.op.contrib import tensorrt import loggi… --- ## [TVM use Tensorrt is so slowly](https://discuss.tvm.apache.org/t/tvm-use-tensorrt-is-so-slowly/18472)
**Author:** [@wjh](https://discuss.tvm.apache.org/u/wjh)\ **Replies:** 0\ **Last updated:** [July 17, 2025, 2:07am UTC](https://discuss.tvm.apache.org/t/tvm-use-tensorrt-is-so-slowly/18472 "2025-07-17T02:07:18Z")
builder\_ = nvinfer1::createInferBuilder(\*logger) this function is very time-consuming and has been called more than once. Does the this call every time there is a subgraph? this function is nvidia api. here is my code … --- ## [How to integrate other backend accelerators with TVM](https://discuss.tvm.apache.org/t/how-to-integrate-other-backend-accelerators-with-tvm/704)
**Author:** [@reminisce](https://discuss.tvm.apache.org/u/reminisce)\ **Replies:** 5\ **Last updated:** [July 17, 2025, 2:07am UTC](https://discuss.tvm.apache.org/t/how-to-integrate-other-backend-accelerators-with-tvm/704 "2025-07-17T02:07:15Z")
We have a use case where we need to support running TensorRT (TRT) from TVM. The basic idea is feed subgraphs containing TRT compatible operators to TRT engine for compilation and execution, and compile and run the rest … --- ## [\`call\_tir\` initialize \`out\_sinfo\` outside](https://discuss.tvm.apache.org/t/call-tir-initialize-out-sinfo-outside/18463)
**Author:** [@reikdas](https://discuss.tvm.apache.org/u/reikdas)\ **Replies:** 1\ **Last updated:** [July 16, 2025, 4:33am UTC](https://discuss.tvm.apache.org/t/call-tir-initialize-out-sinfo-outside/18463 "2025-07-16T04:33:25Z")
import tvm from tvm.script import relax as R from tvm.script import ir as I from tvm.script import tir as T @I.ir\_module class Module: @T.prim\_func def dense\_loop( CSR\_VAL: T.handle, INDICES: T.h… --- ## [Inspecting generated cuda host code](https://discuss.tvm.apache.org/t/inspecting-generated-cuda-host-code/18382)
**Author:** [@darkttur](https://discuss.tvm.apache.org/u/darkttur)\ **Replies:** 2\ **Last updated:** [July 9, 2025, 9:16am UTC](https://discuss.tvm.apache.org/t/inspecting-generated-cuda-host-code/18382 "2025-07-09T09:16:05Z")
Hi, I’m trying to generate different memory allocation plannings for Nvidia GPUs, and would like to analyze the CUDA memory allocations of TVM IRModules depending on various optimizations. For this, I need to see the cu… --- ## [How to represent int8 gemm with int32 output](https://discuss.tvm.apache.org/t/how-to-represent-int8-gemm-with-int32-output/13571)
**Author:** [@naivebird](https://discuss.tvm.apache.org/u/naivebird)\ **Replies:** 2\ **Last updated:** [July 5, 2025, 7:37am UTC](https://discuss.tvm.apache.org/t/how-to-represent-int8-gemm-with-int32-output/13571 "2025-07-05T07:37:09Z")
def matmul(M, K, N, dtype): A = te.placeholder((M, K), name="A", dtype=dtype) B = te.placeholder((K, N), name="B", dtype=dtype) k = te.reduce\_axis((0, K), name="k") matmul = te.compute( (M, N), … --- ## [Provide external functions as TVMScript?](https://discuss.tvm.apache.org/t/provide-external-functions-as-tvmscript/18371)
**Author:** [@reikdas](https://discuss.tvm.apache.org/u/reikdas)\ **Replies:** 5\ **Last updated:** [June 30, 2025, 8:17pm UTC](https://discuss.tvm.apache.org/t/provide-external-functions-as-tvmscript/18371 "2025-06-30T20:17:26Z")
I have a simple TVMScript program: import tvm from tvm.ir.module import IRModule from tvm.script import tir as T @T.prim\_func def main(A: T.Buffer\[(128,), "float32"\], B: T.Buffer\[(128,), "float32"\], … --- ## [Why are neither 256bit SIMD vectors nor FMAD instructions used by autotuning?](https://discuss.tvm.apache.org/t/why-are-neither-256bit-simd-vectors-nor-fmad-instructions-used-by-autotuning/18429)
**Author:** [@FabianSchuetze](https://discuss.tvm.apache.org/u/FabianSchuetze)\ **Replies:** 1\ **Last updated:** [June 26, 2025, 5:27pm UTC](https://discuss.tvm.apache.org/t/why-are-neither-256bit-simd-vectors-nor-fmad-instructions-used-by-autotuning/18429 "2025-06-26T17:27:38Z")
Thanks for the wonderful library. It’s a pleasure to work with it. I am a bit puzzled by the generated code for a matrix multiplication. I see neither 256bit SIMD vectors nor FMA instructions although I specify the targ… --- ## [Which pass is expected to fused or combined operator in TVM](https://discuss.tvm.apache.org/t/which-pass-is-expected-to-fused-or-combined-operator-in-tvm/18398)
**Author:** [@vfdff](https://discuss.tvm.apache.org/u/vfdff)\ **Replies:** 3\ **Last updated:** [June 25, 2025, 11:49am UTC](https://discuss.tvm.apache.org/t/which-pass-is-expected-to-fused-or-combined-operator-in-tvm/18398 "2025-06-25T11:49:57Z")
In llvm, we have a combine pass to transform some operators to another operator , sush as mull + add → mla/madd. so I make a simple demo to test it in tvm(tbe), and find it is not done in tir passes (common pass for tvm… --- ## [Static library build for linking](https://discuss.tvm.apache.org/t/static-library-build-for-linking/18433)
**Author:** [@giabattag](https://discuss.tvm.apache.org/u/giabattag)\ **Replies:** 0\ **Last updated:** [June 24, 2025, 7:40pm UTC](https://discuss.tvm.apache.org/t/static-library-build-for-linking/18433 "2025-06-24T19:40:28Z")
Hello, I am new to TVM so maybe this is an easy question. I have a PyTorch model which I converted into TVM using tvm.relay.frontend.from\_pytorch. I generated A library using the following: tvm\_target = tvm.target.Targ… --- ## [\[tvm0.20.0-Relax\] How to codegen llvm-ir with Relax?](https://discuss.tvm.apache.org/t/tvm0-20-0-relax-how-to-codegen-llvm-ir-with-relax/18409)
**Author:** [@zhaochenyuangit](https://discuss.tvm.apache.org/u/zhaochenyuangit)\ **Replies:** 4\ **Last updated:** [June 24, 2025, 7:40pm UTC](https://discuss.tvm.apache.org/t/tvm0-20-0-relax-how-to-codegen-llvm-ir-with-relax/18409 "2025-06-24T19:40:24Z")
Hello everyone, I’ve worked a lot with LLVM but new to TVM. I would like to implement my own tvm backend to codegen custom llvm-IR. However, it seems that the infrastructure API has vastly changed in the latest release … --- ## [Relay for dynamic shape](https://discuss.tvm.apache.org/t/relay-for-dynamic-shape/18432)
**Author:** [@jhgerald](https://discuss.tvm.apache.org/u/jhgerald)\ **Replies:** 0\ **Last updated:** [June 24, 2025, 7:40pm UTC](https://discuss.tvm.apache.org/t/relay-for-dynamic-shape/18432 "2025-06-24T19:40:03Z")
Is there any possible way to input dynamic shape for model compiled by relay.build or relay.backend.vm.compile from onnx model ? I specified a dim as the dynamic dimension with relay.Any() and tried all the methods tha… --- ## [rtvm\_cpp replacement](https://discuss.tvm.apache.org/t/rtvm-cpp-replacement/18431)
**Author:** [@ElhamBadri2411](https://discuss.tvm.apache.org/u/ElhamBadri2411)\ **Replies:** 0\ **Last updated:** [June 24, 2025, 7:40pm UTC](https://discuss.tvm.apache.org/t/rtvm-cpp-replacement/18431 "2025-06-24T19:40:01Z")
Hi, I am new to apache tvm and I have read through the docs. I was wondering if there is a replacement for cpp\_rtvm or some example on how to have a runner for the single exported library for version 20 --- ## [\[dump\] any option can dump the relay and tir IR for each pass ？](https://discuss.tvm.apache.org/t/dump-any-option-can-dump-the-relay-and-tir-ir-for-each-pass/18402)
**Author:** [@vfdff](https://discuss.tvm.apache.org/u/vfdff)\ **Replies:** 1\ **Last updated:** [June 18, 2025, 1:53am UTC](https://discuss.tvm.apache.org/t/dump-any-option-can-dump-the-relay-and-tir-ir-for-each-pass/18402 "2025-06-18T01:53:56Z")
It there any option in tvm similar to -print-after-all in the llvm, which can dump the llvm IR for each pass ? When I look for the solution in deepseek, it give a example to use dump\_pass\_ir=1, from tvm import relay … --- ## [How to debug tir::Stmt?](https://discuss.tvm.apache.org/t/how-to-debug-tir-stmt/18407)
**Author:** [@vfdff](https://discuss.tvm.apache.org/u/vfdff)\ **Replies:** 2\ **Last updated:** [June 19, 2025, 1:24pm UTC](https://discuss.tvm.apache.org/t/how-to-debug-tir-stmt/18407 "2025-06-19T13:24:25Z")
I’m new to debug the tvm code with gdb, but has no idea to print its value? such as for a stmt node: a) I tried the \*p ::tvm::ir::AsText(stmt.get()) and p tvm::AsText(stmt).str(),and both failed with the following in… --- ## [How to determine function execution order from TVM Relay build output](https://discuss.tvm.apache.org/t/how-to-determine-function-execution-order-from-tvm-relay-build-output/18391)
**Author:** [@EunbinSeo](https://discuss.tvm.apache.org/u/EunbinSeo)\ **Replies:** 0\ **Last updated:** [June 13, 2025, 2:08am UTC](https://discuss.tvm.apache.org/t/how-to-determine-function-execution-order-from-tvm-relay-build-output/18391 "2025-06-13T02:08:54Z")
I used relay.build to generate a module and then extracted the C code using get\_source. However, the generated C code does not contain a definition of the overall model. Instead, it only includes individual functions cor… --- ## [Why not provide some regression testing of the model?](https://discuss.tvm.apache.org/t/why-not-provide-some-regression-testing-of-the-model/18333)
**Author:** [@erdayang](https://discuss.tvm.apache.org/u/erdayang)\ **Replies:** 2\ **Last updated:** [June 10, 2025, 2:36am UTC](https://discuss.tvm.apache.org/t/why-not-provide-some-regression-testing-of-the-model/18333 "2025-06-10T02:36:43Z")
I recently found that the documentation of TVM is not very complete. When I searched for some optimization documents at night, the links were all from a few years ago, and some were even invalid. This shows that there we… --- ## [Does tvm support dynamic input shape?](https://discuss.tvm.apache.org/t/does-tvm-support-dynamic-input-shape/11069)
**Author:** [@Ftz](https://discuss.tvm.apache.org/u/Ftz)\ **Replies:** 25\ **Last updated:** [June 10, 2025, 2:14am UTC](https://discuss.tvm.apache.org/t/does-tvm-support-dynamic-input-shape/11069 "2025-06-10T02:14:22Z")
I have a LSTM model written with pytorch, and first i convert it to onnx model, this model has a dynamic input shape represent as: \[batch\_size, seq\_number\], so when i compile this model with: relay.frontend.from\_onnx(onn… --- ## [Why doesn't the official tutorial work?](https://discuss.tvm.apache.org/t/why-doesnt-the-official-tutorial-work/18209)
**Author:** [@Jianhua-Cui](https://discuss.tvm.apache.org/u/Jianhua-Cui)\ **Replies:** 7\ **Last updated:** [June 9, 2025, 3:17pm UTC](https://discuss.tvm.apache.org/t/why-doesnt-the-official-tutorial-work/18209 "2025-06-09T15:17:12Z")
I installed tvm from the source code according to the official website and passed the Python-based installation verification steps. Subsequently, I tried running this chapter from the tutorial: End-to-End Optimize Model… --- ## [Is it possible to generate code with int value instead of pointer as parameters?](https://discuss.tvm.apache.org/t/is-it-possible-to-generate-code-with-int-value-instead-of-pointer-as-parameters/18383)
**Author:** [@ddwolf](https://discuss.tvm.apache.org/u/ddwolf)\ **Replies:** 0\ **Last updated:** [June 9, 2025, 7:50am UTC](https://discuss.tvm.apache.org/t/is-it-possible-to-generate-code-with-int-value-instead-of-pointer-as-parameters/18383 "2025-06-09T07:50:19Z")
I have a task to generate code for a onnx model, the input and output data are very small, e.g. 1 single int value. the code should be as fast as possible, so I want to generate code for the operator. But the PrimFunc I … --- ## [Is mlc-llm abandoned?](https://discuss.tvm.apache.org/t/is-mlc-llm-abandoned/18321)
**Author:** [@brekky](https://discuss.tvm.apache.org/u/brekky)\ **Replies:** 3\ **Last updated:** [June 5, 2025, 4:19am UTC](https://discuss.tvm.apache.org/t/is-mlc-llm-abandoned/18321 "2025-06-05T04:19:49Z")
We’ve recently been working with mlc-llm and believe that it’s an excellent library. However, the version of TVM currently used in MLC-LLM has diverged quite a bit from the mainline TVM. Additionally, there doesn’t seem… --- ## [Offload a reshape part of relax IR](https://discuss.tvm.apache.org/t/offload-a-reshape-part-of-relax-ir/18356)
**Author:** [@Irfan](https://discuss.tvm.apache.org/u/Irfan)\ **Replies:** 0\ **Last updated:** [May 29, 2025, 10:17am UTC](https://discuss.tvm.apache.org/t/offload-a-reshape-part-of-relax-ir/18356 "2025-05-29T10:17:14Z")
Hi There! Given the model IR I want to partition this part lv4: R.Tensor((batch\_size, 2, 3), dtype="float32") = R.reshape(lv3, R.shape(\[batch\_size, 2, 3\])) The pattern language used is as follow from tvm imp… --- ## [How to force kernels to be fused or combined in TVM.](https://discuss.tvm.apache.org/t/how-to-force-kernels-to-be-fused-or-combined-in-tvm/18347)
**Author:** [@EssamWisam](https://discuss.tvm.apache.org/u/EssamWisam)\ **Replies:** 0\ **Last updated:** [May 27, 2025, 1:02pm UTC](https://discuss.tvm.apache.org/t/how-to-force-kernels-to-be-fused-or-combined-in-tvm/18347 "2025-05-27T13:02:49Z")
I have a simple PyTorch model: class MyModel(torch.nn.Module): def forward(self, x): return torch.relu(x @ x.T + x) When I try to compile it down into CUDA with: with tvm.transform.PassContext(opt\_level=3… --- ## [How can I make a whole network into single task?](https://discuss.tvm.apache.org/t/how-can-i-make-a-whole-network-into-single-task/18338)
**Author:** [@jwJ](https://discuss.tvm.apache.org/u/jwJ)\ **Replies:** 0\ **Last updated:** [May 25, 2025, 3:49pm UTC](https://discuss.tvm.apache.org/t/how-can-i-make-a-whole-network-into-single-task/18338 "2025-05-25T15:49:29Z")
Hello. I have question for AutoScheduler. I’ve been trying to integrate subgraphs to one graph, so I can make one task for a whole network. I tried a lot of things, but none of them worked. Is there a recommended way… --- ## [Is there any way to dump the cpu host code?](https://discuss.tvm.apache.org/t/is-there-any-way-to-dump-the-cpu-host-code/16523)
**Author:** [@raviv](https://discuss.tvm.apache.org/u/raviv)\ **Replies:** 1\ **Last updated:** [May 23, 2025, 11:31am UTC](https://discuss.tvm.apache.org/t/is-there-any-way-to-dump-the-cpu-host-code/16523 "2025-05-23T11:31:19Z")
Hi, can anyone please help me to get the CPU host code, currently I can create the .so file but I want it in the form of c/c++ code. I tried to get the c code from the \_ffi\_api.ModulePackImportsToC from export\_library fu… [Previous page](https://discuss.tvm.apache.org/c/questions/7.md?page=1) [Next page](https://discuss.tvm.apache.org/c/questions/7.md?page=3)